A 300-GHz Phase Shifter and High-Power VCO for Phased Array Applications
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This paper presents a 300-GHz phase shifter and a fundamental high-power VCO designed using a 250-nm InP double heterojunction bipolar transistor (DHBT) technology. The phase shifter employs a 180° reflection-type phase shifter (RTPS) and a 1-bit 180° active switched-type phase shifter (STPS) to achieve a 360° phase shift range. The STPS includes an active single-pole double-throw (SPDT) switch for compensating insertion loss of the passive components and providing gain. The simulation shows that the phase shifter achieves a full 360° phase shift over the frequency range from 220 to 320 GHz. The peak average gain is 1.3 dB at 285 GHz and the 3-dB bandwidth is 50 GHz. In addition, the common-base cross-coupled VCO core employs a coupled-line feedback to minimize the loss caused by via interconnections. To further increase the output power, the differential signal from the output buffer is combined by a slotline power combiner. By modeling the microstrip-to-slotline transition, the equivalent circuit and impedance matching of the combiner is analyzed. The simulated output power is 8.4 dBm at 300 GHz and the dc power consumption is 90 mW. This leads to a peak dc-to-RF efficiency of 7.2 %. The VCO exhibits a simulated frequency tuning range of 20 GHz (300‒320-GHz).
Abstract
This paper presents a 300-GHz phase shifter and a fundamental high-power VCO designed using a 250-nm InP double heterojunction bipolar transistor (DHBT) technology. The phase shifter employs a 180° reflection-type phase shifter (RTPS) and a 1-bit 180° active switched-type phase shifter (STPS) to achieve a 360° phase shift range. The STPS includes an active single-pole double-throw (SPDT) switch for compensating insertion loss of the passive components and providing gain. The simulation shows that the phase shifter achieves a full 360° phase shift over the frequency range from 220 to 320 GHz. The peak average gain is 1.3 dB at 285 GHz and the 3-dB bandwidth is 50 GHz. In addition, the common-base cross-coupled VCO core employs a coupled-line feedback to minimize the loss caused by via interconnections. To further increase the output power, the differential signal from the output buffer is combined by a slotline power combiner. By modeling the microstrip-to-slotline transition, the equivalent circuit and impedance matching of the combiner is analyzed. The simulated output power is 8.4 dBm at 300 GHz and the dc power consumption is 90 mW. This leads to a peak dc-to-RF efficiency of 7.2 %. The VCO exhibits a simulated frequency tuning range of 20 GHz (300‒320-GHz).
참고문헌 (20)
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