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Self-Biasing 효과로 높은 홀딩 전압을 갖는 SCR 기반 양방향 ESD 보호 소자에 관한 연구

A Study on SCR-based Dual Directional ESD Protection Device with High Holding Voltage by Self-Biasing Effect

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초록

본 논문은 추가 기생 바이폴라 BJT로 인해 높은 홀딩전압을 갖는 ESD 보호소자에 Self-Biasing 구조를 추가하여 12V 급 어플리케이션에 적합한 새로운 ESD 보호소자를 제안한다. 제안된 소자의 동작원리와 전기적 특성 검증을 위해 Synopsys사의 TCADSimulation을 사용하여 current density simulation과 HBM simulation을 수행하였고 추가된 Self-Biasing 구조 동작을 확인하였다. Simulation 결과 제안된 ESD 보호소자는 기존의 ESD 보호소자와 비교하여 높은 수준의 홀딩전압을 갖는 것을 확인하였고이는 듀얼구조로 인한 높은 면적효율과 12V급 어플리케이션에서 충분한 래치업 면역 특성을 가질 것으로 기대된다.

Abstract

This paper propose a new ESD protection device suitable for 12V class applications by adding a self-biasingstructure to an ESD protection device with high holding voltage due to additional parasitic bipolar BJT. To verifythe operating principle and electrical characteristics of the proposed device, current density simulation and HBMsimulation were performed using Synopsys' TCAD Simulation, and the operation of the additional self-biasingstructure was confirmed. As a result of the simulation, it was confirmed that the proposed ESD protection devicehas a higher level of holding voltage compared to the existing ESD protection device. It is expected to have higharea efficiency due to the dual structure and sufficient latch-up immunity in 12V-class applications.

참고문헌 (7)

  1. S. Oleg, "ESD Protection Device and Circuit Design for Advanced CMOS Technologies" (2008), Springer
  2. Albert Z. H. Wang, "On-Chip ESD Protection for Integrated Circuits" (2002), Springer
  3. Ming-Dou Ker, "Investigation and Design of On-Chip Power-Rail ESD Clamp Circuits Without Suffering Latchup-Like Failure During System-Level ESD Test", IEEE Journal of Solid-State Circuits, 43(11), pp.2533~2545 (2008), Institute of Electrical and Electronics Engineers (IEEE)[DOI]
  4. A. V. Vladislav, "ESD Design for Analog Circuits" (2010), Springer
  5. Ming-Dou Ker, "Implementation of initial-on ESD protection concept with PMOS triggered SCR devices in deep-submicron CMOS technology", IEEE Journal of Solid-State Circuits, 42(5), pp.1158~1168 (2007), Institute of Electrical and Electronics Engineers (IEEE)[DOI]
  6. Ming-Dou Ker, "Overview of on-chip electrostatic discharge protection design with SCR-based devices in CMOS integrated circuits", IEEE Transactions on Device and Materials Reliability, 5(2), pp.235~249 (2005), Institute of Electrical and Electronics Engineers (IEEE)[DOI]
  7. Feibo Du, "An Improved Silicon-Controlled Rectifier (SCR) for Low-Voltage ESD Application", IEEE Transactions on Electron Devices, 67(2), pp.576~581 (2020), Institute of Electrical and Electronics Engineers (IEEE)[DOI]

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